Workshop Programme


Tuesday, 4 December 2018

09:00 - 12:00 Integration Workhop
  building 3, BAH1
10:30 - 12:00 R&S tutorial
  CFEL
13:30 - 15:00 MTCA.4 Tutorial
  CFEL
13:30 - 15:00 Introduction to ChimeraTK
  CFEL
15:00 - 15:30 Coffee Break
15:30 - 17:00 Timing in MTCA
  CFEL
15:30 - 17:00 Direct Memory Access with FPGA
  CFEL

 


Wednesday, 5 December 2018

08:30 - 09:00 Registration
09:00 - 09:30 Welcome & Introduction
09:30 - 10:30 Session 1
10:30 - 11:00 Coffee Break & Posters
11:00 - 12:30 Session 2
12:30 - 14:15 Lunch
13:00 - 14:00 DESY Tour #1
14:15 - 15:45 Session 3
15:45 - 16:15 Coffee Break
16:15 - 17:30 Session 4
19:30 - 22:30 Workshop Dinner at MS Hanseatic

 


Thursday, 6 December 2018

09:00 - 10:30 Session 5
10:30 - 11:00 Coffee Break & Posters
11:00 - 12:30 Session 6
12:30 - 14:15 Lunch
13:00 - 14:00 DESY Tour #2
14:15 - 15:45 Session 7
15:45 - 16:15 Coffee Break
16:15 - 17:15 Session 8
   
   

 

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